Compute Express Link™: The Breakthrough CPU-to-Device Interconnect
Compute Express Link™ (CXL™) is an industry-supported Cache-Coherent Interconnect for Processors, Memory Expansion and Accelerators. CXL technology maintains memory coherency between the CPU memory space and memory on attached devices, which allows resource sharing for higher performance, reduced software stack complexity, and lower overall system cost. This permits users to simply focus on target workloads as opposed to the redundant memory management hardware in their accelerators.
CXL is designed to be an industry open standard interface for high-speed communications, as accelerators are increasingly used to complement CPUs in support of emerging applications such as Artificial Intelligence and Machine Learning.
CXL 2.0 Specification is Available Now
The CXL 2.0 Specification 1.1 adds support for switching for fan-out to connect to more devices; memory pooling for increased memory utilization efficiency and providing memory capacity on demand; and support for persistent memory – all while preserving industry investments by supporting full backwards compatibility with CXL 1.1 and 1.0.
Key Highlights of the CXL 2.0 Specification:
Adds support for switching to enable device fanout, memory scaling, expansion and the migration of resources.
Includes memory pooling support to maximize memory utilization, limiting or eliminating the need to overprovision memory.
Adds link-level Integrity and Data Encryption (CXL IDE) to provide confidentiality, integrity and replay protection for data transiting the CXL link.
Download the CXL 2.0 white paper for more details.