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Compute Express Link: The Breakthrough CPU-to-Device Interconnect
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Compute Express Link (CXL) is an industry-supported Cache-Coherent Interconnect for Processors, Memory Expansion and Accelerators. 

 

The CXL Consortium is an open industry standard group formed to develop technical specifications that facilitate breakthrough performance for emerging usage models while supporting an open ecosystem for data center accelerators and other high-speed enhancements.

Update: The CXL 2.0 Specification Evaluation Copy is now available for Download. Read our press release and white paper to learn more. 

Update: Technical Work Group Meetings are underway! Join Now as a Contributor to participate.

Register for the Upcoming CXL Consortium Events!

CXL™ Consortium Webinar 
Available to CXL™ Consortium members and the general public

Register for the “Introducing the Compute Express Link™ 2.0 Specification” webinar – December 10, 2020, from 9 AM PT

This webinar will explore the new features of the CXL 2.0 Specification which adds support for switching for fan-out to connect to more devices; memory pooling for increased memory utilization efficiency and providing memory capacity on demand; and support for persistent memory – all while preserving industry investments by supporting full backward compatibility with CXL 1.1 and 1.0.

Be sure to bring questions to the live Q&A with webinar presenters:

  • Debendra Das Sharma, CXL Consortium Technical Task Force Co-Chair and Intel Fellow and Director, I/O Technology and Standards

  • Ahmad Danesh, Manager, Product Marketing and Strategy – Data Center Solutions, Microchip Technology Inc.

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Spread the word - registration is now open!

Please contact info@computeexpresslink.org if you have any questions.

 

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