Introduction to Compute Express Link (CXL): The CPU-To-Device Interconnect Breakthrough
Updated: Nov 12, 2019
By Scott Knowlton
Compute Express Link (CXL) technology was unveiled in March 2019 and quickly became the talk of the High Performance Computing (HPC) and Enterprise Cloud industries with the release of CXL Specification 1.0. The intent of this Blog posting is to provide basic information on CXL and provide pointers to additional information.
In short, CXL is an open industry standard interconnect offering high-bandwidth, low-latency connectivity between the host processor and devices including accelerators, memory expansion, and smart I/O devices. CXL utilizes the PCI Express® (PCIe®) 5.0 physical layer infrastructure and the PCIe alternate protocol to address the demanding needs of high-performance computational workloads in Artificial Intelligence, Machine Learning, communication systems, and HPC through the enablement of coherency and memory semantics across heterogeneous processing and memory systems.
The CXL transaction layer is comprised of three dynamically multiplexed sub-protocols on a single link.
· CXL.io: Provides discovery, configuration, register access, interrupts, etc.
· CXL.cache: Provides the CXL device access to the processor memory
· CXL.memory: Provides the Processor access to the CXL device attached memory
Each of these are illustrated in the block below.
Since its introduction, many prospective CXL member companies, developers and users have been eager to learn more about this new interconnect and the many advantages it brings to next-generation data center performance. In response to the groundswell of industry interest, the CXL Consortium published a brief technical whitepaper that provides a high-level overview of CXL technology, its performance capabilities, and target applications.
Introduction to Compute Express Link Whitepaper > DOWNLOAD HERE
Additionally, CXL Consortium member companies and supporting industry groups recently provided an overview of CXL technology last August at the Flash Memory Summit (FMS) 2019 in Santa Clara, CA. The session featured a CXL introductory presentation and panel that covered pressing topics, including:
· Industry Need for CXL
· Overview of CXL
· CXL Features / Benefits
· CXL Use Cases
· Bringing CXL to the Industry / How to Contribute
The CXL Consortium made these slides publicly available for those who were unable to attend the FMS session in-person.
Compute Express Link (CXL): A Coherent Interface for Ultra-High-Speed Transfers (FMS 2019) > DOWNLOAD HERE
Looking for the latest information on CXL? Be sure to check out our online CXL Resource Library frequently as new CXL educational materials will be posted often.