CXL™ Consortium and Gen-Z Consortium™ MoU Update: A Path to Protocol
By Kurtis Bowman and Jason Duquette
Since we announced the Memorandum of Understanding (MoU) agreement between the CXL™ Consortium and Gen-Z Consortium™ last year, the organizations’ joint working group has been busy defining three specific use cases – from an initial pool of over 30 – that will benefit from a CXL to Gen-Z bridge.
Compute Express Link™ and Gen-Z are both memory semantic (read/write) protocols that enable high-speed connectivity to processors, accelerators and memory expansion technologies, and make possible the low-latency sharing of memory and storage resource pools among processing elements like CPUs, GPUs, AI Accelerators or FPGAs. CXL focuses on enabling coherent node-level computing, whereas Gen-Z focuses on fabric connectivity at the rack and row level.
The joint working group initially identified over 30 distinct use cases before narrowing it down to three priority use cases that it is progressing on:
Pooled Memory Use Case: Meant for a single initiator over a Gen-Z fabric, native CXL devices can be cache-coherent across the Gen-Z fabric (See “Pooled Memory Use Case” dataflow in black in Figure 1)
Shared Memory Model Use Case: No implied cache coherency to each of the initiators, can use memory-over-Gen-Z fabric in a shared fashion; this use case is for coherency model to be a global, software coherency model (See “Shared Memory Model Use Case” dataflow in red in Figure 1)
Accelerator Use Case: Disaggregation of accelerators in a non-shared model, where a single host is able to access one or more accelerators over Gen-Z fabric; treats remote accelerators as if they were native CXL accelerators through the introduction of a CXL to Gen-Z bridge (See “Accelerator Use Case” dataflow in green in Figure 1)
Each CXL-to-Gen-Z bridge would have the functionality of a CXL switch, but the topology of this hardware is still under investigation. The working group is also exploring how the bridge is connected to the Gen-Z fabric and how this fabric is managed. The bridge itself will be implemented in silicon.
Fig. 1: This diagram is illustrating the three priority use cases identified by the MoU Working Group
Now is the Time to Join
In order to participate in the working group, a company must be a Promoter or Contributor member of the CXL Consortium and a General or Associate Member of the Gen-Z Consortium.
We’ve had tremendous participation with 43 members representing 20 different companies joining the working group meetings – helping to define and prioritize the use cases and develop the bridging specification. We encourage companies to join both organizations so they can contribute to this important work and help accelerate the spec development.
For more information on joining the Gen-Z Consortium, visit: https://genzconsortium.org/about-us/membership/become-a-member/. If you are interested in joining the CXL Consortium, visit: www.computeexpresslink.org/join.