Compute Express Link™ 2.0 Specification Now Available!
By: Dr. Debendra Das Sharma, Intel Fellow and Director, I/O Technology and Standards, and Siamak Tavallaei, Principal Architect, Microsoft Azure Hardware Architecture
Co-Chairs, Technical Task Force, CXL™ Consortium
On behalf of the CXL Consortium Technical Task Force, we’re pleased to share that the Compute Express Link™ (CXL™) 2.0 specification has been completed and is now available for public download on the Consortium’s specification page. A special thank you to our dedicated technical work group members who helped bring this significant achievement to fruition. The publication of the CXL 2.0 specification is an important achievement to meet the performance demands of next-generation data centers.
The CXL 2.0 specification adds switching support providing fan-out to enable connection to more devices; memory pooling for increased memory utilization efficiency and providing memory capacity on demand; and support for persistent memory. In addition, it supports full backwards compatibility with CXL 1.1 and 1.0.
“One of the more exciting connectivity standards over the past year has been CXL. Built upon a PCIe physical foundation, CXL is a connectivity standard designed to handle much more than what PCIe does – aside from simply acting as a data transfer from host to device, CXL has three branches to support, known as IO, Cache, and Memory. As defined in the CXL 1.0 and 1.1 standards, these three form the basis of a new way to connect a host with a device. The new CXL 2.0 standard takes it a step further.” Dr. Ian Cutress, AnandTech
“While we expect to see early CXL 1.x generation products in late 2021/ early 2022, the industry is waiting for CXL 2.0 for a very important reason: switches and retimers. Indeed, we have heard major cloud providers talking about CXL 1.x as nice for development, but CXL 2.0 as tantalizing for deployment.” Patrick Kennedy, ServeTheHome
Learn More: CXL 2.0 Public Webinar and Members-only Technical Training
To support the launch of the CXL 2.0 specification, we will be hosting a webinar on Thursday, December 10, 2020 at 9 AM PT. In this webinar, presenters Debendra Das Sharma (Intel) and Ahmad Danesh (Microchip) will explore the new features in the CXL 2.0 specification and answer your questions.
Register for the CXL 2.0 webinar here.
Member companies can download our Technical Training Workshops, scheduled for December 1-3. These sessions will provide an in-depth look at the specification chapters. Download the members-only training presentation and recording. Not a member? Learn how to join the CXL Consortium and about the benefits of membership including access to technical training here.
White Paper: Introduction to CXL 2.0 Specification
Compute Express Link™ and CXL™ Consortium are trademarks of the Compute Express Link Consortium.