

Compute Express Link™: The Breakthrough CPU-to-Device Interconnect
Member News
To include your company's CXL technology-related announcement on this page, send your press release to press@computeexpresslink.org for consideration.
Press Releases
-
September 19, 2023: Astera Labs First to Break Through the Memory Wall with Industry’s Highest Performance CXL Memory Controllers
-
August 7, 2023: Micron Launches Memory Expansion Module Portfolio to Accelerate CXL 2.0 Adoption
-
January 31, 2023: Astera Labs Launches Cloud-Scale Interop Lab to Enable Seamless Deployment of CXL Solutions at Scale
-
August 30, 2022: Astera Labs Enters Pre-Production Phase of Leo Memory Connectivity Platform for CXL-Attached Memory Expansion and Pooling
-
August 2, 2022: Microchip Introduces New CXL™ Smart Memory Controllers for Data Center Computing Enabling Modern CPUs to Optimize Application Workloads
-
July 21, 2022: MemVerge Hosts Full-Day Forum, "CXL: Getting Ready for Takeoff," at the Flash Memory Summit
-
May 6, 2022: Montage Technology Delivers the World’s First CXL™ Memory eXpander Controller
-
April 14, 2022: Elastics.cloud, Inc. Announces an Additional $17M of Funding to Accelerate Global Growth and Product Development
-
March 9, 2022: Astera Labs Unlocks Next-Gen Cloud Connectivity with Aries PCIe® 5.0 and CXL™ 2.0 Smart Retimers Production Release
-
January 10, 2022: Elastics.cloud Announces Strategic Investment by SK hynix
-
December 20, 2022: Elastics.cloud Adds Key Leadership Talent to Their Team
-
November 15, 2021: Astera Labs Introduces Industry’s First CXL™ 2.0 Memory Accelerator SoC Platform
-
May 11, 2021: Samsung Unveils Industry-First Memory Module Incorporating New CXL Interconnect Standard
-
April 15, 2021: Avery Design Debuts CXL™ 2.0 System-level VIP Simulation Solution
-
March 10, 2021: Astera Labs Expands Focus to Deliver Purpose-Built Solutions That Address Connectivity Bottlenecks Throughout the Data Center
-
November 10, 2020: Microchip Extends Leadership in Data Center Connectivity with Industry’s Lowest Latency PCI Express 5.0 and CXL 2.0 Retimers
-
November 10, 2020: Synopsys Announces Industry's First CXL 2.0 VIP Solution for Breakthrough SoC Performance
-
October 22, 2020: SiPearl Joins the CXL™ Consortium Behind Compute Express Link™, the Breakthrough CPU-to-Device Interconnect
-
October 8, 2020: Synopsys DesignWare CXL IP Supports AMBA CXS Protocol Targeting High-Performance Computing SoCs
-
February 24, 2020: Mobiveil Announces Availability of Compute Express Link (CXL) IP (COMPEX) for High-Performance Applications
-
September 11, 2019: Synopsys Delivers Industry's First Compute Express Link (CXL) IP Solution for Breakthrough Performance in Data-Intensive SoCs
Members in the News
-
March 9, 2023: Enabling New Server Architectures With the CXL Interconnect
-
May 3, 2022: Composable Memory within CXL 2.0 Protocol Shown by Liqid, Samsung, Tanzanite
-
November 5, 2021: Heterogeneous Computing Is About Optimizing Resources
-
October 6, 2021: CXL and the Tiered-Memory Future of Servers
-
September 29, 2021: CXL Ushers in a New Era of Data-Center Architecture
-
September 7, 2021: The CXL Roadmap Opens Up the Memory Hierarchy
-
August 18, 2021: Intel Hot Interconnects 2021 CXL Keynote Coverage
-
July 16, 2021: CXL Product Pipeline Gets Flowing
-
July 12, 2021: Securing Server Systems And Data At The Hardware Level
-
July 8, 2021: CXL Signals A New Era Of Data Center Architecture
-
July 8, 2021: How CXL is Changing the Data Center
-
June 12, 2021: Tear Down These Walls: How CXL Could Reinvent the Data Center